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SUMMARY:5 bit current steering low power DAC for threshold voltage adjustm
 en
DTSTART;VALUE=DATE-TIME:20161014T063000Z
DTEND;VALUE=DATE-TIME:20161014T070000Z
DTSTAMP;VALUE=DATE-TIME:20260720T005605Z
UID:indico-contribution-727@cern.ch
DESCRIPTION:Speakers: Ilyas Sagdiev (NRNU MEPHI)\nA low power area efficie
 nt 5 bit current steering DAC is presented. The proposed DAC is integrated
  to prototype the readout channel for muon chamber in CBM experiment. DAC 
 was implemented with an area of 0.019 mm2 in the CMOS process using UMS MM
 RF 180 nm technology. This DAC has ultralow power consumption - 25μW. The
  measured differential nonlinearity (DNL) is better than 0.25 LSB\, integr
 al nonlinearity (INL) is better than 0.2 LSB. In this paper the main steps
  of design flow\, simulation results and measurement results are presented
 .\n\nhttps://indico.particle.mephi.ru/event/4/contributions/727/
LOCATION:Milan Hotel Hall of the 2nd floor
URL:https://indico.particle.mephi.ru/event/4/contributions/727/
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