Speaker
Mr.
Dmitry Normanov
(NRNU Mephi)
Description
A low-power digital peak detector, intended for use in a 32-channel IC, reading out and processing the signals of the FAIR accelerator detectors of the CBM experiment, is considered. In compare with its analogues the peak detector (PD) has been added by an option of correcting input disturbances, which may be digitized by on ADC. The block has been designed for operation with an 8-bit ADC, placed in the IC’s readout channel and having the following characteristics: power consumption 0.46 mW, occupied area 115 x 115 mm2, operation frequency of 50 MHz. Due to its efficient parameters on power consumption and occupied areas the given block meets the requirements, set to the CBM electronics, and will be included in the 32-channel IC for reading out the GEM detector signals, which is under development in MEPhI ASIC LAB. The PD block is implemented by the 180nm CMOS technology of UMC (Taiwan).
Primary authors
Mr.
Dmitry Normanov
(NRNU Mephi)
Mr.
Pavel Ivanov
(NRNU MEPhI)
Co-authors
Dr.
Eduard Atkin
(National Research Nuclear University MEPhI)
Mr.
Oleg Shumkin
(National Research Nuclear University MEPhI (Moscow Engineering Physics Institute))
