The 2nd international conference on particle physics and astrophysics

Substrate noise isolation technique for mixed-signal ASICs in particle physics instrumentation

14 Oct 2016, 09:30

30m

Hall of the 2nd floor (Milan Hotel)

Poster Methods of experimental physics Poster session - V

Description

The paper describes methodology of substrate noise isolation for ASICs implemented in the CMOS processes. Up-to-date CMOS technologies allow embedding the digital processing blocks into the same die as the readout analog part. This significantly improves the functionality and complexity of the readout ASICs. In fact performance of the precision analog circuits (e.g. charge sensitive amplifier, shaper, etc.) can suffer from the additional noise contribution from the high-frequency digital part. This work describes the ways of decrease the substrate noise influence on the sensitive circuits of the readout channels. Simulation results and comparison of different isolation approaches are considered in the paper.