The 2nd international conference on particle physics and astrophysics

Layout-aware Soft Error Rate Estimation Technique for Integrated Circuits under the Environment with Energetic Charged Particles

14 Oct 2016, 14:45

15m

Vivaldi-Boccerini (Milan Hotel)

Plenary/section talk Methods of experimental physics Methods of experimental physics - parallel VI

Description

This work considers the technique for modeling of multiple errors caused by charged particles in sub-100 nm devices. This technique estimates the Soft Error Rate taking into account layout of integrated circuit. Comparison of simulated data with data from experiments on testing facilities is provided.