10-14 October 2016
Milan Hotel
Europe/Moscow timezone

5 bit current steering low power DAC for threshold voltage adjustmen

14 Oct 2016, 09:30
30m
Hall of the 2nd floor (Milan Hotel)

Hall of the 2nd floor

Milan Hotel

Shipilovskaya Street, 28A, Moscow, Russia, 115563
Poster Methods of experimental physics Poster session - V

Speaker

Mr. Ilyas Sagdiev (NRNU MEPHI)

Description

A low power area efficient 5 bit current steering DAC is presented. The proposed DAC is integrated to prototype the readout channel for muon chamber in CBM experiment. DAC was implemented with an area of 0.019 mm2 in the CMOS process using UMS MMRF 180 nm technology. This DAC has ultralow power consumption - 25μW. The measured differential nonlinearity (DNL) is better than 0.25 LSB, integral nonlinearity (INL) is better than 0.2 LSB. In this paper the main steps of design flow, simulation results and measurement results are presented.

Primary author

Mr. Ilyas Sagdiev (NRNU MEPHI)

Co-authors

Dr. Eduard Atkin (National Research Nuclear University MEPhI)

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