5-10 October 2015
Milan Hotel 4*
Europe/Moscow timezone

A Low jitter All - Digital Phase - Locked Loop in 180 nm CMOS technology

10 Oct 2015, 09:30
30m
Milan Hotel 4*

Milan Hotel 4*

Milan Hotel 4*, Shipilovskaya Street, 28A, Moscow, Russia, 115563
Methods of experimental physics Poster session V

Speaker

Mr. Oleg Shumkin (National Research Nuclear University MEPhI (Moscow Engineering Physics Institute))

Description

Abstract — An all-digital phase-locked loop (ADPLL) was implemented in 180 nm CMOS technology. The proposed ADPLL uses a novel digitally controlled oscillator to achieve 1 ps resolution. The pure digital phase locked loop is attractive because it is less sensitive to noise and operating conditions than its analog counterpart. The proposed ADPLL can be easily ported to different process as a soft IP block, making it very suitable for system-on-chip applications.
Presentation type Poster

Primary author

Mr. Oleg Shumkin (National Research Nuclear University MEPhI (Moscow Engineering Physics Institute))

Co-authors

Mr. Dmitry Normanov (NRNU Mephi) Mr. Pavel Ivanov (NRNU MEPhI) Mr. Vladimir Butuzov (National Research Nuclear University MEPhI (Moscow Engineering Physics Institute))

Presentation Materials

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