5-10 October 2015
Milan Hotel 4*
Europe/Moscow timezone

Creating a parameterized model of a CMOS transistor with a gate of enclosed layuot.

10 Oct 2015, 09:30
30m
Milan Hotel 4*

Milan Hotel 4*

Milan Hotel 4*, Shipilovskaya Street, 28A, Moscow, Russia, 115563
Methods of experimental physics Poster session V

Speakers

Mr. Pavel Ivanov (NRNU MEPhI) Mr. Sergey Vinogradov (NRNU "MEPhI")

Description

We consider the method of creating a parametrized Space model of an N-channel transistor with a gate of enclosed layuot. This model provide an increased radiation tolerance. Formulas and examples of engineering calculation for the operation of models in the computer-aided Design environment of Cadence Vitruoso. Calculations are made for the CMOS technology with 180 nm design rules of the UMC.
Presentation type Poster

Primary author

Mr. Sergey Vinogradov (NRNU "MEPhI")

Co-authors

Dr. Eduard Atkin (National Research Nuclear University MEPhI) Mr. Pavel Ivanov (NRNU MEPhI)

Presentation Materials

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